N. Udayakumar, A. Chakraborty, M. Irannejad, Bo Cui, A. Brzezinski, Mustafa Yavuz
{"title":"使用缓冲层对石墨烯基电子器件的纳米线键合和电导性能的影响","authors":"N. Udayakumar, A. Chakraborty, M. Irannejad, Bo Cui, A. Brzezinski, Mustafa Yavuz","doi":"10.1109/NANO.2014.6968079","DOIUrl":null,"url":null,"abstract":"Nanowire bonding and conductivity of the graphene based transistors at contact interfaces were investigated numerically. It was found that using MoS2 as a buffer layer provides the highest conductivity and smallest overall stress, which makes it preferable for graphene electronic device fabrication.","PeriodicalId":367660,"journal":{"name":"14th IEEE International Conference on Nanotechnology","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The effects of using buffer layers on nanowire bonding and conductance properties of graphene based electronic devices\",\"authors\":\"N. Udayakumar, A. Chakraborty, M. Irannejad, Bo Cui, A. Brzezinski, Mustafa Yavuz\",\"doi\":\"10.1109/NANO.2014.6968079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nanowire bonding and conductivity of the graphene based transistors at contact interfaces were investigated numerically. It was found that using MoS2 as a buffer layer provides the highest conductivity and smallest overall stress, which makes it preferable for graphene electronic device fabrication.\",\"PeriodicalId\":367660,\"journal\":{\"name\":\"14th IEEE International Conference on Nanotechnology\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"14th IEEE International Conference on Nanotechnology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2014.6968079\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th IEEE International Conference on Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2014.6968079","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The effects of using buffer layers on nanowire bonding and conductance properties of graphene based electronic devices
Nanowire bonding and conductivity of the graphene based transistors at contact interfaces were investigated numerically. It was found that using MoS2 as a buffer layer provides the highest conductivity and smallest overall stress, which makes it preferable for graphene electronic device fabrication.