动态脉冲MTCMOS与总线编码的总功率和串扰最小化

H. Singh, R. Rao, D. Sylvester, Richard B. Brown, K. Nowka
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引用次数: 12

摘要

随着芯片上全局线路上缓冲器插入量的增加和泄漏功率贡献的增加,导致缓冲器泄漏成为系统泄漏功率的主要来源之一。我们提出了一种用于全局母线中继器的新型功率门控方案,该方案解决了运行时泄漏的紧迫问题,同时消除了相邻母线之间的最坏情况电容耦合。我们建议使用脉冲MTCMOS(多阈值CMOS)方案,仅在传输信号时动态激活总线系统。此外,总线编码方案用于消除最坏情况耦合,从而消除功率门控和脉冲产生的性能损失。我们考虑了延迟和漏功率的所有来源,包括MTCMOS控制电路的来源。这种技术可以使低开关活动的总母线系统功率降低近30%,在没有重新激活延迟损失的情况下,待机模式泄漏减少高达2.3倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dynamically pulsed MTCMOS with bus encoding for total power and crosstalk minimization
Increased buffer insertion along on-chip global lines and the increasing contribution of leakage power have resulted in buffer leakage emerging as one of the chief contributors to system leakage power. We present a novel power-gating scheme for repeaters on global bus lines that address the pressing problem of runtime leakage while simultaneously eliminating worst-case capacitive coupling between adjacent bus lines. We propose using a pulsed MTCMOS (multiple threshold CMOS) scheme that dynamically activates the bus system only when transmitting a signal. Additionally, a bus encoding scheme is used to eliminate worst-case coupling and thereby negate the power-gating and pulse generation performance penalty. We consider all sources of delay and leakage power, including that of the MTCMOS control circuitry. This technique can result in nearly a 30% reduction in total bus system power for low switching activities and up to 2.3 times reduction in standby mode leakage with no reactivation delay penalty.
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