{"title":"创新实践环节3C硬件安全","authors":"Jeyavijayan Rajendran, P. Song, S. Natarajan","doi":"10.1109/VTS.2017.7928931","DOIUrl":null,"url":null,"abstract":"Michael Chen Mentor Graphics The continued growth of electronics, coupled with the consolidation of the semiconductor industry, will drive new multi-purpose SoCs and result in new complexities associated with managing the security of multiple chip variants as they proliferate in supply chain. The vast attack surface for potential intrusions poses increasing vulnerabilities in electronics devices threatening security, privacy, and safety. Mentor Graphics is developing a secure end-to-end platform that enables SoC suppliers to create unique fingerprint SoCs, and a secure end-to-end design IP camouflage methodology. SoC supplier and consumer can protect their IP, authenticate chips at any point, monitor them, and gather analytics about their usage. As a result, connected SoC suppliers will be able to securely provision SoC features in the field, provide secure field updates, and improve product lifecycle management while protecting their crown jewel IP, prevent loss of revenue, and increase differentiation to their customers.","PeriodicalId":123648,"journal":{"name":"IEEE VLSI Test Symposium","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Innovative practices session 3C hardware security\",\"authors\":\"Jeyavijayan Rajendran, P. Song, S. Natarajan\",\"doi\":\"10.1109/VTS.2017.7928931\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Michael Chen Mentor Graphics The continued growth of electronics, coupled with the consolidation of the semiconductor industry, will drive new multi-purpose SoCs and result in new complexities associated with managing the security of multiple chip variants as they proliferate in supply chain. The vast attack surface for potential intrusions poses increasing vulnerabilities in electronics devices threatening security, privacy, and safety. Mentor Graphics is developing a secure end-to-end platform that enables SoC suppliers to create unique fingerprint SoCs, and a secure end-to-end design IP camouflage methodology. SoC supplier and consumer can protect their IP, authenticate chips at any point, monitor them, and gather analytics about their usage. As a result, connected SoC suppliers will be able to securely provision SoC features in the field, provide secure field updates, and improve product lifecycle management while protecting their crown jewel IP, prevent loss of revenue, and increase differentiation to their customers.\",\"PeriodicalId\":123648,\"journal\":{\"name\":\"IEEE VLSI Test Symposium\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE VLSI Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS.2017.7928931\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2017.7928931","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Michael Chen Mentor Graphics The continued growth of electronics, coupled with the consolidation of the semiconductor industry, will drive new multi-purpose SoCs and result in new complexities associated with managing the security of multiple chip variants as they proliferate in supply chain. The vast attack surface for potential intrusions poses increasing vulnerabilities in electronics devices threatening security, privacy, and safety. Mentor Graphics is developing a secure end-to-end platform that enables SoC suppliers to create unique fingerprint SoCs, and a secure end-to-end design IP camouflage methodology. SoC supplier and consumer can protect their IP, authenticate chips at any point, monitor them, and gather analytics about their usage. As a result, connected SoC suppliers will be able to securely provision SoC features in the field, provide secure field updates, and improve product lifecycle management while protecting their crown jewel IP, prevent loss of revenue, and increase differentiation to their customers.