{"title":"1.6mW 0.5GHz开环VGA,具有快速启动和UWB无线电偏移校准功能","authors":"P. Harpe, Cui Zhou, K. Philips, H. D. Groot","doi":"10.1109/ESSCIRC.2011.6044925","DOIUrl":null,"url":null,"abstract":"This paper presents a low-power fast-startup wideband VGA with a 6th-order low-pass filter function for UWB radios. A DC-coupled 6-stage open-loop topology is proposed, which includes DC offset calibration and fast-startup biasing circuits. The prototype in 90nm CMOS occupies only 0.075mm2, including decoupling capacitors and digital interfacing. The circuit consumes 1.6mW from a 1V supply, achieves −1.2dB up to 37.7dB gain with a programmable bandwidth from 80MHz to 460MHz, and achieves a startup-time of 12ns.","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A 1.6mW 0.5GHz open-loop VGA with fast startup and offset calibration for UWB radios\",\"authors\":\"P. Harpe, Cui Zhou, K. Philips, H. D. Groot\",\"doi\":\"10.1109/ESSCIRC.2011.6044925\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low-power fast-startup wideband VGA with a 6th-order low-pass filter function for UWB radios. A DC-coupled 6-stage open-loop topology is proposed, which includes DC offset calibration and fast-startup biasing circuits. The prototype in 90nm CMOS occupies only 0.075mm2, including decoupling capacitors and digital interfacing. The circuit consumes 1.6mW from a 1V supply, achieves −1.2dB up to 37.7dB gain with a programmable bandwidth from 80MHz to 460MHz, and achieves a startup-time of 12ns.\",\"PeriodicalId\":239979,\"journal\":{\"name\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"102 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2011.6044925\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2011.6044925","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 1.6mW 0.5GHz open-loop VGA with fast startup and offset calibration for UWB radios
This paper presents a low-power fast-startup wideband VGA with a 6th-order low-pass filter function for UWB radios. A DC-coupled 6-stage open-loop topology is proposed, which includes DC offset calibration and fast-startup biasing circuits. The prototype in 90nm CMOS occupies only 0.075mm2, including decoupling capacitors and digital interfacing. The circuit consumes 1.6mW from a 1V supply, achieves −1.2dB up to 37.7dB gain with a programmable bandwidth from 80MHz to 460MHz, and achieves a startup-time of 12ns.