{"title":"新型低功耗ICO/VCO双交叉耦合高速架构","authors":"N. Tchamov, A. Popov, P. Jarske","doi":"10.1109/AMICD.1996.569370","DOIUrl":null,"url":null,"abstract":"New circuits of high-speed multivibrators have been developed and subsequently used to create a new ICO/VCO circuit. While implemented on 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude on the symmetrical output of 550 mV at 2 GHz, with consumption less than 3.3 mW from 1.5 V power supply can be easily achieved. The control ability of the ICO is about 2.6 MHz//spl mu/A. The low phase-noise makes the circuit also suitable for building high-speed PLLs for various applications in communications and microprocessors.","PeriodicalId":356572,"journal":{"name":"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings","volume":"211 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"New low-power ICO/VCO with double cross-coupled high-speed architecture\",\"authors\":\"N. Tchamov, A. Popov, P. Jarske\",\"doi\":\"10.1109/AMICD.1996.569370\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"New circuits of high-speed multivibrators have been developed and subsequently used to create a new ICO/VCO circuit. While implemented on 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude on the symmetrical output of 550 mV at 2 GHz, with consumption less than 3.3 mW from 1.5 V power supply can be easily achieved. The control ability of the ICO is about 2.6 MHz//spl mu/A. The low phase-noise makes the circuit also suitable for building high-speed PLLs for various applications in communications and microprocessors.\",\"PeriodicalId\":356572,\"journal\":{\"name\":\"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings\",\"volume\":\"211 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AMICD.1996.569370\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AMICD.1996.569370","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
New low-power ICO/VCO with double cross-coupled high-speed architecture
New circuits of high-speed multivibrators have been developed and subsequently used to create a new ICO/VCO circuit. While implemented on 0.8 /spl mu/m BiCMOS (14 GHz NPN) an amplitude on the symmetrical output of 550 mV at 2 GHz, with consumption less than 3.3 mW from 1.5 V power supply can be easily achieved. The control ability of the ICO is about 2.6 MHz//spl mu/A. The low phase-noise makes the circuit also suitable for building high-speed PLLs for various applications in communications and microprocessors.
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