{"title":"二维离散小波变换的高效结构实现","authors":"Jinook Song, I. Park","doi":"10.1109/SOCDC.2008.4815749","DOIUrl":null,"url":null,"abstract":"This paper presents a new architecture of 2-dimensional discrete wavelet transform for JPEG2000, and the architecture is verified by implementing on FPGA board. The tile-based processing is proposed which removes the transpose buffer effectively.","PeriodicalId":405078,"journal":{"name":"2008 International SoC Design Conference","volume":"70 Suppl4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementation of efficient architecture of two-dimensional discrete wavelet transform\",\"authors\":\"Jinook Song, I. Park\",\"doi\":\"10.1109/SOCDC.2008.4815749\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new architecture of 2-dimensional discrete wavelet transform for JPEG2000, and the architecture is verified by implementing on FPGA board. The tile-based processing is proposed which removes the transpose buffer effectively.\",\"PeriodicalId\":405078,\"journal\":{\"name\":\"2008 International SoC Design Conference\",\"volume\":\"70 Suppl4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International SoC Design Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCDC.2008.4815749\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International SoC Design Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCDC.2008.4815749","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of efficient architecture of two-dimensional discrete wavelet transform
This paper presents a new architecture of 2-dimensional discrete wavelet transform for JPEG2000, and the architecture is verified by implementing on FPGA board. The tile-based processing is proposed which removes the transpose buffer effectively.