{"title":"采用进化计算方法实现多种逻辑运算的多级逻辑综合","authors":"Takahiro Hozumi, O. Kakusho, K. Yamato","doi":"10.1109/ISMVL.2000.848629","DOIUrl":null,"url":null,"abstract":"This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures.","PeriodicalId":334235,"journal":{"name":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An evolutionary computing approach to multilevel logic synthesis using various logic operations\",\"authors\":\"Takahiro Hozumi, O. Kakusho, K. Yamato\",\"doi\":\"10.1109/ISMVL.2000.848629\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures.\",\"PeriodicalId\":334235,\"journal\":{\"name\":\"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)\",\"volume\":\"74 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2000.848629\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 30th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2000)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2000.848629","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An evolutionary computing approach to multilevel logic synthesis using various logic operations
This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures.