干蚀刻原位难熔发射极触点技术中的高性能110nm InGaAs/InP dhbt

V. Jain, E. Lobisser, A. Baraskar, B. Thibeault, M. Rodwell, Z. Griffith, M. Urteaga, S. Bartsch, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu
{"title":"干蚀刻原位难熔发射极触点技术中的高性能110nm InGaAs/InP dhbt","authors":"V. Jain, E. Lobisser, A. Baraskar, B. Thibeault, M. Rodwell, Z. Griffith, M. Urteaga, S. Bartsch, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu","doi":"10.1109/DRC.2010.5551887","DOIUrl":null,"url":null,"abstract":"We report a 110 nm InP/In<inf>0.53</inf>Ga<inf>0.47</inf>As/InP double heterojunction bipolar transistor (DHBT) demonstrating a simultaneous f<inf>t</inf>/f<inf>max</inf> of 465/660 GHz and operating at power densities in excess of 50 mW/µm<sup>2</sup>. To our knowledge this is the smallest junction width reported for a III–V DHBT. The narrow 110 nm emitter junction permits the devices to be biased simultaneously at high voltages and high current densities (J<inf>e</inf>) with peak RF performance at 41 mW/µm<sup>2</sup> (J<inf>e</inf> = 23.6 mA/µm<sup>2</sup>, V<inf>ce</inf> = 1.75 V). Devices incorporate low contact resistance, refractory, in-situ Mo emitter contact to a highly doped, regrown InGaAs cap. A low stress, sputter deposited, refractory, dry-etched W/Ti<inf>0.1</inf>W<inf>0.9</inf> emitter metal process was developed demonstrating both high emitter yield and scalability to sub-100 nm junctions. Previously reported dry etch processes involving Ti/Ti<inf>0.1</inf>W<inf>0.9</inf> metals could not be scaled below 180 nm junction widths due to high metal stress resulting in very low emitter yield [1, 2]. The emitter metal contacts reported here are 100 nm wide and the emitter-base junction width is 110 nm. On-wafer Through-Reflect-Line (TRL) calibration structures were used to measure the RF performance of devices from 140 – 180 GHz.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"High performance 110 nm InGaAs/InP DHBTs in dry-etched in-situ refractory emitter contact technology\",\"authors\":\"V. Jain, E. Lobisser, A. Baraskar, B. Thibeault, M. Rodwell, Z. Griffith, M. Urteaga, S. Bartsch, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu\",\"doi\":\"10.1109/DRC.2010.5551887\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report a 110 nm InP/In<inf>0.53</inf>Ga<inf>0.47</inf>As/InP double heterojunction bipolar transistor (DHBT) demonstrating a simultaneous f<inf>t</inf>/f<inf>max</inf> of 465/660 GHz and operating at power densities in excess of 50 mW/µm<sup>2</sup>. To our knowledge this is the smallest junction width reported for a III–V DHBT. The narrow 110 nm emitter junction permits the devices to be biased simultaneously at high voltages and high current densities (J<inf>e</inf>) with peak RF performance at 41 mW/µm<sup>2</sup> (J<inf>e</inf> = 23.6 mA/µm<sup>2</sup>, V<inf>ce</inf> = 1.75 V). Devices incorporate low contact resistance, refractory, in-situ Mo emitter contact to a highly doped, regrown InGaAs cap. A low stress, sputter deposited, refractory, dry-etched W/Ti<inf>0.1</inf>W<inf>0.9</inf> emitter metal process was developed demonstrating both high emitter yield and scalability to sub-100 nm junctions. Previously reported dry etch processes involving Ti/Ti<inf>0.1</inf>W<inf>0.9</inf> metals could not be scaled below 180 nm junction widths due to high metal stress resulting in very low emitter yield [1, 2]. The emitter metal contacts reported here are 100 nm wide and the emitter-base junction width is 110 nm. On-wafer Through-Reflect-Line (TRL) calibration structures were used to measure the RF performance of devices from 140 – 180 GHz.\",\"PeriodicalId\":396875,\"journal\":{\"name\":\"68th Device Research Conference\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"68th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2010.5551887\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"68th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2010.5551887","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

我们报道了110 nm InP/In0.53Ga0.47As/InP双异质结双极晶体管(DHBT),其同时ft/fmax为465/660 GHz,工作功率密度超过50 mW/µm2。据我们所知,这是III-V型DHBT报道的最小结宽。窄的110 nm发射极结允许器件在高电压和高电流密度(Je)下同时偏置,峰值射频性能为41 mW/µm2 (Je = 23.6 mA/µm2, Vce = 1.75 V)。器件将低接触电阻,难熔,原位Mo发射极接触到高掺杂,再生的InGaAs帽。开发了干蚀刻W/Ti0.1W0.9发射极金属工艺,展示了高发射极良率和亚100 nm结的可扩展性。先前报道的涉及Ti/Ti0.1W0.9金属的干式蚀刻工艺由于高金属应力导致极低的发射极产率而无法缩放到180 nm以下的结宽[1,2]。本文报道的发射极金属触点宽度为100nm,发射极-基极结宽度为110nm。采用晶圆通反射线(TRL)校准结构测量140 - 180 GHz器件的射频性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High performance 110 nm InGaAs/InP DHBTs in dry-etched in-situ refractory emitter contact technology
We report a 110 nm InP/In0.53Ga0.47As/InP double heterojunction bipolar transistor (DHBT) demonstrating a simultaneous ft/fmax of 465/660 GHz and operating at power densities in excess of 50 mW/µm2. To our knowledge this is the smallest junction width reported for a III–V DHBT. The narrow 110 nm emitter junction permits the devices to be biased simultaneously at high voltages and high current densities (Je) with peak RF performance at 41 mW/µm2 (Je = 23.6 mA/µm2, Vce = 1.75 V). Devices incorporate low contact resistance, refractory, in-situ Mo emitter contact to a highly doped, regrown InGaAs cap. A low stress, sputter deposited, refractory, dry-etched W/Ti0.1W0.9 emitter metal process was developed demonstrating both high emitter yield and scalability to sub-100 nm junctions. Previously reported dry etch processes involving Ti/Ti0.1W0.9 metals could not be scaled below 180 nm junction widths due to high metal stress resulting in very low emitter yield [1, 2]. The emitter metal contacts reported here are 100 nm wide and the emitter-base junction width is 110 nm. On-wafer Through-Reflect-Line (TRL) calibration structures were used to measure the RF performance of devices from 140 – 180 GHz.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信