实现纳米级真空通道晶体管的大气工作

G. Rughoobur, J. Zhao, L. Jain, Ahmad Zubair, T. Palacios, J. Kong, A. Akinwande
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引用次数: 2

摘要

由于无电子散射和无冲击电离/击穿,真空沟道晶体管是具有高约翰逊优值(~10 14 V/s)潜力的终极宽带隙结构[1],[2]。因此,在恶劣环境下,纳米级真空通道晶体管(NVCTs)在速度、击穿电压和可靠性方面可能优于固态晶体管[1]。载流子通过电子穿过被电场变窄的障壁而注入到通道中。这种电子源可以使用高封装密度(≥10 8 / cm2)的纳米级门控Si场发射极阵列(FEAs)和具有低导通电压(8.5 V)、低工作电压、高电流密度(150 A/ cm2)和长寿命(>300小时)的自对准孔径来实现[3]。然而,势垒高度对气体分子的吸附/解吸很敏感,导致在低真空条件下产生大的电流变化,这也可能产生侵蚀发射器的高能离子。因此,有限元分析需要昂贵且笨重的超高真空(UHV)系统来保证可靠性[4]。使用多层石墨烯(Gr),可以承受高压梯度,对电子透明,但不受气体分子的影响,可以使这些FEAs在低真空条件下运行[5],[6]。在本文中,使用Gr层封装具有两个自对准门的有限元(图1);这种结构允许独立控制施加到Gr层的偏置,并显着减少了封装的体积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Enabling Atmospheric Operation of Nanoscale Vacuum Channel Transistors
A vacuum channel transistor is the ultimate wide band-gap structure with potential for high Johnson figure of merit (~10 14 V/s) due to no electron scattering and no impact ionization/breakdown [1] , [2] . Hence, nanoscale vacuum channel transistors (NVCTs) can possibly outperform solid-state transistors in terms of speed, breakdown voltage and reliability in harsh environments [1] . Carriers are injected into the channel by electron tunneling across a barrier narrowed by an electric field. Such electron sources can be realized using nanoscale gated Si field emitter arrays (FEAs) with high packing densities (≥10 8 /cm 2 ) and self-aligned apertures which have low turn-on voltage (8.5 V), low operating voltage, high current density (150 A/cm 2 ) and long lifetime (>300 hours) [3] . The barrier height is nonetheless sensitive to adsorption/desorption of gas molecules, resulting in large current variations in poor vacuum, which can also generate energetic ions that erode the emitter. Hence FEAs require costly and bulky ultra-high vacuum (UHV) systems for reliability [4] . Using multi-layers of graphene (Gr) that withstand high pressure gradients and, are transparent to electrons, but impervious to gas molecules, can enable operation of these FEAs in poor vacuum [5] , [6] . In this paper, Gr layers are used to encapsulate such FEAs with two self-aligned gates ( Fig. 1 ); this structure allows an independent control of the bias applied to the Gr layer, and significantly reduces the volume to be encapsulated.
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