亚μW待机功率，<18 μW /DMIPS@25MHz MCU，内置原子开关可编程逻辑和ROM

2015 Symposium on VLSI Technology (VLSI Technology) Pub Date : 2015-06-16 DOI:10.1109/VLSIT.2015.7223636

Y. Tsuji, X. Bai, M. Miyamura, T. Sakamoto, M. Tada, N. Banno, K. Okamoto, N. Iguchi, N. Sugii, H. Hada

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引用次数: 10

摘要

带原子开关的非易失性可编程逻辑(NPL)可显著提高微控制器的性能。采用65 nm节点SOTB (Silicon-on-Thin-Box) CMOS的低功耗32位cpu在25 MHz和VDD=0.4V时的性能为1.95 DMIPS/MHz和33 μW/MHz。当CPU中的一个软件进程卸载到NPL时，可以实现9倍的处理速度和3倍的能效提升。在SOTB CMOS上的反向体偏置和NPL块的断电将待机功率抑制到0.7 μW。

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Sub-μW standby power, <18 µW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM

A non-volatile programmable logic (NPL) with atom switch significantly accelerates performance of micro-controller unit. A low-power 32bit-CPU using a 65 nm-node Silicon-on-Thin-Box (SOTB) CMOS performs 1.95 DMIPS/MHz and 33 μW/MHz on 25 MHz and VDD=0.4V. When a software process in the CPU is offloaded to NPL, the 9 times faster processing speed and 3 times higher energy efficiency are realized. A reverse body-bias on SOTB CMOS and a power-off of NPL block suppress a standby power down to 0.7 μW.

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2015 Symposium on VLSI Technology (VLSI Technology)

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