{"title":"一种基于100ghz LO消除的高速OOK调制器","authors":"Zubair Mehmood, M. Seo","doi":"10.1109/ISOCC50952.2020.9333121","DOIUrl":null,"url":null,"abstract":"This paper presents a high speed On-Off Keying (OOK) modulator using local oscillator (LO) cancellation technique. Implemented in 28 nm bulk CMOS process, a 100 GHz modulator post layout full-wave EM simulation results are executed for data-rate up to 50 Gbps. The modulator has on-off isolation of 21.6 dB. The proposed modulator design consumes power up to 9.6 mW and occupies chip area of 0.025 mm2.","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 100 GHz LO Cancellation Based High Speed OOK Modulator\",\"authors\":\"Zubair Mehmood, M. Seo\",\"doi\":\"10.1109/ISOCC50952.2020.9333121\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a high speed On-Off Keying (OOK) modulator using local oscillator (LO) cancellation technique. Implemented in 28 nm bulk CMOS process, a 100 GHz modulator post layout full-wave EM simulation results are executed for data-rate up to 50 Gbps. The modulator has on-off isolation of 21.6 dB. The proposed modulator design consumes power up to 9.6 mW and occupies chip area of 0.025 mm2.\",\"PeriodicalId\":270577,\"journal\":{\"name\":\"2020 International SoC Design Conference (ISOCC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC50952.2020.9333121\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9333121","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 100 GHz LO Cancellation Based High Speed OOK Modulator
This paper presents a high speed On-Off Keying (OOK) modulator using local oscillator (LO) cancellation technique. Implemented in 28 nm bulk CMOS process, a 100 GHz modulator post layout full-wave EM simulation results are executed for data-rate up to 50 Gbps. The modulator has on-off isolation of 21.6 dB. The proposed modulator design consumes power up to 9.6 mW and occupies chip area of 0.025 mm2.