{"title":"分段线性曲率补偿CMOS带隙基准","authors":"Hong-Yi Huang, Ru-Jie Wang, Shih-Chiang Hsu","doi":"10.1109/ICECS.2008.4674852","DOIUrl":null,"url":null,"abstract":"A low-voltage low-power bandgap voltage reference without using passive components is presented. Using piecewise linear curvature-compensated scheme, a reference voltage of 646.4 mV is generated with a temperature coefficient of 1.7 ppm/degC in the range [-40, +125] degC at 1.8-V supply voltage. A line sensitivity of 0.18 mV/V in the supply voltage range [+1, +1.8] V is achieved. It dissipates a maximum power of 4.4 muW at a 1.8-V supply voltage and 125 degC. The silicon area is 100 times 50 mum2 in 0.18um CMOS process.","PeriodicalId":404629,"journal":{"name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Piecewise linear curvature-compensated CMOS bandgap reference\",\"authors\":\"Hong-Yi Huang, Ru-Jie Wang, Shih-Chiang Hsu\",\"doi\":\"10.1109/ICECS.2008.4674852\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-voltage low-power bandgap voltage reference without using passive components is presented. Using piecewise linear curvature-compensated scheme, a reference voltage of 646.4 mV is generated with a temperature coefficient of 1.7 ppm/degC in the range [-40, +125] degC at 1.8-V supply voltage. A line sensitivity of 0.18 mV/V in the supply voltage range [+1, +1.8] V is achieved. It dissipates a maximum power of 4.4 muW at a 1.8-V supply voltage and 125 degC. The silicon area is 100 times 50 mum2 in 0.18um CMOS process.\",\"PeriodicalId\":404629,\"journal\":{\"name\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2008.4674852\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2008.4674852","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Piecewise linear curvature-compensated CMOS bandgap reference
A low-voltage low-power bandgap voltage reference without using passive components is presented. Using piecewise linear curvature-compensated scheme, a reference voltage of 646.4 mV is generated with a temperature coefficient of 1.7 ppm/degC in the range [-40, +125] degC at 1.8-V supply voltage. A line sensitivity of 0.18 mV/V in the supply voltage range [+1, +1.8] V is achieved. It dissipates a maximum power of 4.4 muW at a 1.8-V supply voltage and 125 degC. The silicon area is 100 times 50 mum2 in 0.18um CMOS process.
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