{"title":"WSI互连网络容错设计及其在超立方体中的应用","authors":"Hideo Ito","doi":"10.1109/DFTVS.1993.595652","DOIUrl":null,"url":null,"abstract":"A defect-tolerant design for WSI interconnection networks (INs) is proposed, and three schemes with different switch structures are examined. Open defects on wiring lines and short defects between adjacent two wiring lines in links are assumed for defects in INs. The basic idea of the proposed design is to add redundant wiring lines and switches into each physical link. The three schemes are compared by evaluating yields when they are applied to hypercube networks. As a result, one scheme is superior to others, and an effect of defect-tolerant design by the scheme is effective and useful for six and eight dimensional hypercubes.","PeriodicalId":213798,"journal":{"name":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A defect-tolerant design for WSI interconnection networks and its application to hypercube\",\"authors\":\"Hideo Ito\",\"doi\":\"10.1109/DFTVS.1993.595652\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A defect-tolerant design for WSI interconnection networks (INs) is proposed, and three schemes with different switch structures are examined. Open defects on wiring lines and short defects between adjacent two wiring lines in links are assumed for defects in INs. The basic idea of the proposed design is to add redundant wiring lines and switches into each physical link. The three schemes are compared by evaluating yields when they are applied to hypercube networks. As a result, one scheme is superior to others, and an effect of defect-tolerant design by the scheme is effective and useful for six and eight dimensional hypercubes.\",\"PeriodicalId\":213798,\"journal\":{\"name\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1993.595652\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1993.595652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A defect-tolerant design for WSI interconnection networks and its application to hypercube
A defect-tolerant design for WSI interconnection networks (INs) is proposed, and three schemes with different switch structures are examined. Open defects on wiring lines and short defects between adjacent two wiring lines in links are assumed for defects in INs. The basic idea of the proposed design is to add redundant wiring lines and switches into each physical link. The three schemes are compared by evaluating yields when they are applied to hypercube networks. As a result, one scheme is superior to others, and an effect of defect-tolerant design by the scheme is effective and useful for six and eight dimensional hypercubes.