ESD保护设计，具有可调的回吸行为，适用于100nm CMOS工艺中的5v应用

2013 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2013-04-14 DOI:10.1109/IRPS.2013.6532072

Chang-Tzu Wang, Yu-Chun Chen, Tien-Hao Tang, K. Su

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引用次数: 1

摘要

设计了一种具有DNW沉片的n通道静电放电(ESD)保护装置，该装置在5v工作条件下无锁存风险。采用DNW沉片可以抑制NMOS的回跳行为，提高保持电压。该防静电装置可承受3.6kV人体模型(HBM)和325V机器模型(MM)的ESD测试。保持电压为6.4V时，暂存测试显示对7.5V电压测试和200ma电流测试的抗扰度。

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ESD protection design with adjustable snapback behavior for 5-V application in 100nm CMOS process

An N-channel electrostatic discharge (ESD) protection device with DNW sinker has been designed without latch-up risk for 5-V operating condition. With the DNW sinker, the NMOS snapback behavior can be restrained and the holding voltage can be increased. The proposed ESD protection device can sustain 3.6kV human-body-model (HBM) and 325V machine model (MM) ESD tests. With holding voltage of 6.4V, the latch-up test shows the immunity from 7.5V voltage test and 200-mA current test.

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2013 IEEE International Reliability Physics Symposium (IRPS)

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