{"title":"一个开关级符号模拟器","authors":"F. Vos, C. Trullemans","doi":"10.1109/ESSCIRC.1989.5468071","DOIUrl":null,"url":null,"abstract":"The simulator presented in this paper is based on a switch level model and is used to extract the logical behaviour of MOS digital integrated circuits. Its main original features are that the simulation is achieved symbolically with all its generality.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A switch level symbolic simulator\",\"authors\":\"F. Vos, C. Trullemans\",\"doi\":\"10.1109/ESSCIRC.1989.5468071\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The simulator presented in this paper is based on a switch level model and is used to extract the logical behaviour of MOS digital integrated circuits. Its main original features are that the simulation is achieved symbolically with all its generality.\",\"PeriodicalId\":187183,\"journal\":{\"name\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1989.5468071\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1989.5468071","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The simulator presented in this paper is based on a switch level model and is used to extract the logical behaviour of MOS digital integrated circuits. Its main original features are that the simulation is achieved symbolically with all its generality.
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