具有平衡输出的65nm CMOS无电感宽带平衡lna

S. Blaakmeer, E. Klumperink, B. Nauta, D. Leenaerts
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引用次数: 78

摘要

具有有源平衡的无电感LNA设计用于100 MHz和6 GHz之间的多标准无线电应用。它利用一个共同的门阶段和一个共同的源阶段与副本偏置的组合,以最大限度地平衡操作。通过降噪技术,设计的NF在3db左右。其最佳性能在300 MHz至3.5 GHz范围内实现,增益和相位误差低于0.3 dB和+ usmn2度,增益为15 dB, S11<-14 dB, IIP3=0 dBm, IIP2高于+20 dBm,总功耗为21 mW。该电路采用基准65nm CMOS工艺制造,有源面积仅为0.01 mm2。该电路同时实现了阻抗匹配、噪声消除和良好的平衡输出。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An inductorless wideband balun-LNA in 65nm CMOS with balanced output
An inductorless LNA with active balun is designed for multi-standard radio applications between 100 MHz and 6 GHz. It exploits a combination of a common gate stage and a common source stage with replica biasing to maximize balanced operation. The NF is designed to be around 3 dB by using the noise canceling technique. Its best performance is achieved between 300 MHz to 3.5 GHz with gain and phase errors below 0.3 dB and plusmn2 degrees, 15 dB gain, S11<-14 dB, IIP3=0 dBm and IIP2 higher than +20 dBm at a total power consumption of 21 mW. The circuit is fabricated in a baseline 65 nm CMOS process, with an active area of only 0.01 mm2. The circuit simultaneously achieves impedance matching, noise canceling and a well balanced output.
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