保持逻辑转换的测试集

[1992] Proceedings 29th ACM/IEEE Design Automation Conference Pub Date : 1992-07-01 DOI:10.1109/DAC.1992.227760

Michael J. Batek, J. Hayes

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引用次数: 23

摘要

逻辑转换，保持最小或完整的测试集的组合电路进行了检查。一些基本的转换类型在测试集保存方面得到了严格的定义和表征。作者将变换应用于加法器设计，证明了两电平加法器在转换为纹波进位和超前进位设计时可以保留任意完整的测试集，从而验证了最近的一些仿真结果。

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Test-set preserving logic transformations

Logic transformations that preserve minimal or complete test sets of a combinational circuit are examined. Some basic transformation types are rigorously defined and characterized with respect to test-set preservation. The authors apply the transformations to adder design and show that any complete test set for a two-level adder is preserved on transformation to ripple-carry and carry-lookahead designs, thus verifying some recent simulation results.<>

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[1992] Proceedings 29th ACM/IEEE Design Automation Conference

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