MRL -忆阻器比率逻辑

Shahar Kvatinsky, Nimrod Wald, Guy Satat, A. Kolodny, U. Weiser, E. Friedman
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引用次数: 230

摘要

忆阻装置是一种新颖的结构,主要是作为记忆而发展起来的。忆阻器件另一个有趣的应用是逻辑电路。本文描述了忆阻比逻辑(MRL)——一种cmos -忆阻混合逻辑族。在该逻辑家族中,OR和and逻辑门基于忆阻器件,并添加CMOS逆变器以提供完整的逻辑结构和信号恢复。与以前发布的基于记忆的逻辑系列不同,MRL系列与标准CMOS逻辑兼容。给出了一个8位全加法器的案例研究,并讨论了相关的设计注意事项。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
MRL — Memristor Ratioed Logic
Memristive devices are novel structures, developed primarily as memory. Another interesting application for memristive devices is logic circuits. In this paper, MRL (Memristor Ratioed Logic) - a hybrid CMOS-memristive logic family - is described. In this logic family, OR and AND logic gates are based on memristive devices, and CMOS inverters are added to provide a complete logic structure and signal restoration. Unlike previously published memristive-based logic families, the MRL family is compatible with standard CMOS logic. A case study of an eight-bit full adder is presented and related design considerations are discussed.
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