{"title":"采用双阈值电压的低功耗设计","authors":"Yen-Te Ho, TingTing Hwang","doi":"10.1109/ASPDAC.2004.1337566","DOIUrl":null,"url":null,"abstract":"We study the reduction of static power consumption by dual threshold voltage assignment. Our goal is, under given timing constraint, to select a maximum number of gates working at high-Vth such that the total power gain is maximized. We propose a maximum independent set based slack assignment algorithm to select gates for high-Vth. The results show that our assignment algorithm can achieve about 68% improvement as compared to results without using dual Vth.","PeriodicalId":426349,"journal":{"name":"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"35","resultStr":"{\"title\":\"Low power design using dual threshold voltage\",\"authors\":\"Yen-Te Ho, TingTing Hwang\",\"doi\":\"10.1109/ASPDAC.2004.1337566\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We study the reduction of static power consumption by dual threshold voltage assignment. Our goal is, under given timing constraint, to select a maximum number of gates working at high-Vth such that the total power gain is maximized. We propose a maximum independent set based slack assignment algorithm to select gates for high-Vth. The results show that our assignment algorithm can achieve about 68% improvement as compared to results without using dual Vth.\",\"PeriodicalId\":426349,\"journal\":{\"name\":\"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-01-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"35\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.2004.1337566\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2004.1337566","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We study the reduction of static power consumption by dual threshold voltage assignment. Our goal is, under given timing constraint, to select a maximum number of gates working at high-Vth such that the total power gain is maximized. We propose a maximum independent set based slack assignment algorithm to select gates for high-Vth. The results show that our assignment algorithm can achieve about 68% improvement as compared to results without using dual Vth.