Reliable bounds for the propagation delay in VLSI nano interconnects based on Multi Wall Carbon Nano Tubes

The upper and lower bounds of the time-delay due to the variations of some physical and geometrical characteristics of a nano-interconnect based on Multi Wall CNTs, suitable for the 32 and 22nm technology, are evaluated. Interval Analysis is used to define the ranges of the of the p.u.l. parameters of a Transmission Line modeling the interconnect. The Vertex Analysis is then exploited on the parameter space to obtain in a reliable way the time-delay bounding without extensive and costly simulation burden. The obtained results are compared with those of scaled down copper-based structures.