{"title":"三维存储器的高效TSV修复方法","authors":"Ilwoong Kim, Keewon Cho, Sungho Kang","doi":"10.1109/ISOCC.2013.6863974","DOIUrl":null,"url":null,"abstract":"Through-silicon-via (TSV) based 3D stacked memory is recognized as the next generation memory architecture but its low TSV yield is one of the manufacturing cost factors. In this paper, an efficient TSV repair method is proposed for 3D memories. The proposed method uses a new 2-dimensional 1-4 switching technique to enable efficient repair of clustered TSV faults using repair circuitry with reasonable area overhead. Therefore, the proposed TSV repair method can contribute the improvement of TSV yield for 3D memories.","PeriodicalId":129447,"journal":{"name":"2013 International SoC Design Conference (ISOCC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Efficient TSV repair method for 3D memories\",\"authors\":\"Ilwoong Kim, Keewon Cho, Sungho Kang\",\"doi\":\"10.1109/ISOCC.2013.6863974\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Through-silicon-via (TSV) based 3D stacked memory is recognized as the next generation memory architecture but its low TSV yield is one of the manufacturing cost factors. In this paper, an efficient TSV repair method is proposed for 3D memories. The proposed method uses a new 2-dimensional 1-4 switching technique to enable efficient repair of clustered TSV faults using repair circuitry with reasonable area overhead. Therefore, the proposed TSV repair method can contribute the improvement of TSV yield for 3D memories.\",\"PeriodicalId\":129447,\"journal\":{\"name\":\"2013 International SoC Design Conference (ISOCC)\",\"volume\":\"81 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC.2013.6863974\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2013.6863974","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Through-silicon-via (TSV) based 3D stacked memory is recognized as the next generation memory architecture but its low TSV yield is one of the manufacturing cost factors. In this paper, an efficient TSV repair method is proposed for 3D memories. The proposed method uses a new 2-dimensional 1-4 switching technique to enable efficient repair of clustered TSV faults using repair circuitry with reasonable area overhead. Therefore, the proposed TSV repair method can contribute the improvement of TSV yield for 3D memories.