{"title":"DDR存储接口中一种新的CKE-ODT-CSN编码方案","authors":"V. Murugan, Narayanan Mayandi, A. Sendhil","doi":"10.1109/VLSID.2015.40","DOIUrl":null,"url":null,"abstract":"In the continuous evolution of DRAM technologies and increased pin count, the paper outlines the roadblocks faced in adding new pins and presents a novel coding approach for elimination of pins in DDR memory interface. The paper targets CSN, CKE and ODT pins of DRAM and presents a coding algorithm where all the mentioned pins' information is encoded and transferred to the DRAM on only two pins against the original three. The encoding and decoding blocks are discussed across both single data rate and double data rate DDR CA topology. The paper concludes by explaining the importance of the encoding algorithm and the additional features which can be supported through the coding scheme.","PeriodicalId":123635,"journal":{"name":"2015 28th International Conference on VLSI Design","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Novel CKE-ODT-CSN Encoding Scheme in DDR Memory Interface\",\"authors\":\"V. Murugan, Narayanan Mayandi, A. Sendhil\",\"doi\":\"10.1109/VLSID.2015.40\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the continuous evolution of DRAM technologies and increased pin count, the paper outlines the roadblocks faced in adding new pins and presents a novel coding approach for elimination of pins in DDR memory interface. The paper targets CSN, CKE and ODT pins of DRAM and presents a coding algorithm where all the mentioned pins' information is encoded and transferred to the DRAM on only two pins against the original three. The encoding and decoding blocks are discussed across both single data rate and double data rate DDR CA topology. The paper concludes by explaining the importance of the encoding algorithm and the additional features which can be supported through the coding scheme.\",\"PeriodicalId\":123635,\"journal\":{\"name\":\"2015 28th International Conference on VLSI Design\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th International Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSID.2015.40\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2015.40","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Novel CKE-ODT-CSN Encoding Scheme in DDR Memory Interface
In the continuous evolution of DRAM technologies and increased pin count, the paper outlines the roadblocks faced in adding new pins and presents a novel coding approach for elimination of pins in DDR memory interface. The paper targets CSN, CKE and ODT pins of DRAM and presents a coding algorithm where all the mentioned pins' information is encoded and transferred to the DRAM on only two pins against the original three. The encoding and decoding blocks are discussed across both single data rate and double data rate DDR CA topology. The paper concludes by explaining the importance of the encoding algorithm and the additional features which can be supported through the coding scheme.