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引用次数: 1
摘要
本文提出了一种应用于射频接收机的高电源抑制(PSR) CMOS带隙电路。本文为该电路建立了一个精确、简单的PSR模型，可用于纸笔分析。通过对该模型的分析，提出了提高PSR电路在低频段和高频段性能的方法。该电路的PSR在低频时可达102 dB，在高频时可达50 dB以上。所提出的CMOS带隙基准电压已在Chartered 0.25 μ m n阱CMOS工艺中实现。
Design and analysis of high power supply rejection CMOS bandgap voltage reference
In this paper, a high power supply rejection (PSR) CMOS bandgap circuit applied in RF receiver is presented. A precise and simple PSR model, useful for pencil and paper analysis is hereby developed for the circuit. By analyzing the model, the ways to improve the circuit's performance of PSR in both low and high frequency domain are presented. The PSR of the circuit can reach 102 dB at low frequency and is more than 50 dB at high frequency. The proposed CMOS bandgap voltage reference has been implemented in Chartered 0.25-mum N-Well CMOS process.
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