数字VLSI系统中带辅助功率晶体管的基于复制的低压降稳压器

Yang Nan, Chenchang Zhan, Guanhua Wang, Linjun He, Han Li
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引用次数: 1

摘要

提出了一种新型的基于复制的低降差(LDO)稳压器,该稳压器采用辅助功率晶体管和体调制数字VLSI系统。它利用7个不同尺寸的电流比较器控制7个辅助功率晶体管来补偿负载电流。因此,副本LDO的负载调节得到了显着改善,同时对数字系统至关重要的宽负载范围稳定性没有受到损害。该LDO采用标准的0.18 mm CMOS工艺设计。大量的仿真结果表明,在电源为1.2 V、输出电压为1.0 V的情况下,所提出的LDO在向负载输出1~100mA时的压降电压为200mV。负载稳压为0.148mV/mA,支持负载电容范围为0 ~ 100nF。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Replica-Based Low Drop-Out Voltage Regulator with Assistant Power Transistors for Digital VLSI Systems
An advanced replica-based low drop-out (LDO) voltage regulator with assistant power transistors and bulk modulation digital VLSI systems is proposed in this paper. It utilizes seven current comparators with different aspect sizes to control seven assistant power transistors to compensate for the load current. As a result, the load regulation of the replica LDO is significantly improved, while the wide-load-range-stability which is critical for digital systems is not compromised. The proposed LDO is designed in a standard 0.18-mm CMOS process. Extensive simulation results show that, with a power supply of 1.2 V and output voltage of 1.0 V, the proposed LDO has a dropout voltage of 200mV when delivering 1~100mA to the load. The load regulation is 0.148mV/mA, and the supported load capacitance range is from 0 to 100nF.
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