{"title":"一种基于覆盖驱动约束随机的内存控制器功能验证方法","authors":"Yingpan Wu, Lixin Yu, Lidong Lan, Haiyang Zhou","doi":"10.1109/RSP.2008.12","DOIUrl":null,"url":null,"abstract":"This paper presents a coverage-driven Constraint random-based functional verification method of memory controller in a microprocessor. Many special functions are integrated into this memory controller for anti-radiating, so it is more difficult to verify . This system of verification, which is creating by means of verification methodology manual (VMM) for systemverilog and classification trees, is reusable, scalable, configurable and can reduce time of verification.","PeriodicalId":436363,"journal":{"name":"2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A Coverage-Driven Constraint Random-Based Functional Verification Method of Memory Controller\",\"authors\":\"Yingpan Wu, Lixin Yu, Lidong Lan, Haiyang Zhou\",\"doi\":\"10.1109/RSP.2008.12\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a coverage-driven Constraint random-based functional verification method of memory controller in a microprocessor. Many special functions are integrated into this memory controller for anti-radiating, so it is more difficult to verify . This system of verification, which is creating by means of verification methodology manual (VMM) for systemverilog and classification trees, is reusable, scalable, configurable and can reduce time of verification.\",\"PeriodicalId\":436363,\"journal\":{\"name\":\"2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RSP.2008.12\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RSP.2008.12","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Coverage-Driven Constraint Random-Based Functional Verification Method of Memory Controller
This paper presents a coverage-driven Constraint random-based functional verification method of memory controller in a microprocessor. Many special functions are integrated into this memory controller for anti-radiating, so it is more difficult to verify . This system of verification, which is creating by means of verification methodology manual (VMM) for systemverilog and classification trees, is reusable, scalable, configurable and can reduce time of verification.