使用安全操作区域来评估由于工艺变化而导致的逻辑电路的错误概率

2013 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2013-10-01 DOI:10.1109/IIRW.2013.6804188

U. Khalid, A. Mastrandrea, M. Olivieri

{"title":"使用安全操作区域来评估由于工艺变化而导致的逻辑电路的错误概率","authors":"U. Khalid, A. Mastrandrea, M. Olivieri","doi":"10.1109/IIRW.2013.6804188","DOIUrl":null,"url":null,"abstract":"Process variations in conjunction to voltage noise can be responsible of logic errors in digital circuits. The variations in process-induced parameters affect the probability of noise-induced faulty operation of digital logic cells. This work introduces the concept of “safe operation region” to allow an efficient Monte Carlo evaluation of the associated error probability, avoiding time-consuming circuit level or device level Monte Carlo simulations.","PeriodicalId":287904,"journal":{"name":"2013 IEEE International Integrated Reliability Workshop Final Report","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Using safe operation regions to assess the error probability of logic circuits due to process variations\",\"authors\":\"U. Khalid, A. Mastrandrea, M. Olivieri\",\"doi\":\"10.1109/IIRW.2013.6804188\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Process variations in conjunction to voltage noise can be responsible of logic errors in digital circuits. The variations in process-induced parameters affect the probability of noise-induced faulty operation of digital logic cells. This work introduces the concept of “safe operation region” to allow an efficient Monte Carlo evaluation of the associated error probability, avoiding time-consuming circuit level or device level Monte Carlo simulations.\",\"PeriodicalId\":287904,\"journal\":{\"name\":\"2013 IEEE International Integrated Reliability Workshop Final Report\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Integrated Reliability Workshop Final Report\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IIRW.2013.6804188\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Integrated Reliability Workshop Final Report","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW.2013.6804188","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

过程变化加上电压噪声可能导致数字电路中的逻辑错误。过程诱发参数的变化影响数字逻辑单元噪声诱发故障的概率。这项工作引入了“安全操作区域”的概念，允许对相关的错误概率进行有效的蒙特卡罗评估，避免耗时的电路级或器件级蒙特卡罗模拟。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Using safe operation regions to assess the error probability of logic circuits due to process variations

Process variations in conjunction to voltage noise can be responsible of logic errors in digital circuits. The variations in process-induced parameters affect the probability of noise-induced faulty operation of digital logic cells. This work introduces the concept of “safe operation region” to allow an efficient Monte Carlo evaluation of the associated error probability, avoiding time-consuming circuit level or device level Monte Carlo simulations.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2013 IEEE International Integrated Reliability Workshop Final Report

自引率

0.00%

发文量