Y.-S Wu, C. Tsai, T. Miyashita, P.N. Chen, B. Hsu, P. Wu, H. Hsu, C. Chiang, H.H. Liu, H.-L. Yang, K. Kwong, Juei-Chun Chiang, C.-W Lee, Y.-J Lin, C.-A Lu, C. Lin, S. Wu
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Optimization of fin profile and implant in bulk FinFET technology
A comprehensive analysis of fin profile effect on bulk FinFET device characteristics is described in this paper. Optimal fin profile and anti-punch-through (APT) implant profile are important to DC performance and multiple-Vt offering capability, which are essential for system-on-chip (SoC) applications. This study provides practical device design guidelines for bulk FinFET technology.
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