CMOS DC/DC降压变换器噪声耦合与产生的芯片-封装协同建模与验证

Taigon Song, Jiseong Kim, J. Pak, Joungho Kim
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引用次数: 1

摘要

由于系统中不同电路对电源电压的各种需求,DC/DC转换器现在是系统中必不可少的一部分。然而,有许多论文已经处理了效率或针对特定设计定制的新结构,但很少涉及DC/DC转换器的噪声特性,这可能严重影响目标电路所需的输出电源电压。本文分析了芯片封装协同设计中噪声对DC/DC变换器的影响。我们发现PCB板上的去耦电容无法屏蔽所有可能影响DC/DC变换器的噪声,因此需要DC/DC变换器的片上去耦电容。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Chip-Package Co-modeling & Verification of Noise Coupling & Generation in CMOS DC/DC Buck Converter
DC/DC Converters are now an essential part in a system due to the various needs of supply voltage that is necessary for different circuits in the system. However, there are many papers which have dealt for efficiency or for a novel structure that would be customized to the specific design, but few dealt with the noise characteristics of DC/DC Converters which could critically affect to the output supply voltage the target circuit would need. In this paper we analyzed the effect of noise to a DC/DC Converter in a chip-package co-design. We figured out that the decoupling capacitors on the PCB board cannot shield all the noise that could affect to the DC/DC converter, and on-chip decoupling capacitor for a DC/DC Converter would be necessary.
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