{"title":"使用高级协同设计工具自动合成数据流系统。视觉处理器的应用","authors":"A. M. Alvarez, L. Reyneri, F.J.P. Valle","doi":"10.1109/MELCON.2006.1653045","DOIUrl":null,"url":null,"abstract":"In this paper, we present a tool devised for the automatic design and optimization of bioinspired visual processing models using reconfigurable hardware. We have focused on the simulation and optimization characteristics of our system. We also present a retina-like processing system based on a PCI-based FPGA board as an example. The whole system is intended for the design and analysis of real-time vision processing schemes. The top-down design path of our system involves a high level synthesis scheme while allowing different strategies for optimizing the system via the CodeSimulink codesign tool","PeriodicalId":299928,"journal":{"name":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Automatic synthesis of data-flow systems using high level codesign tool. Application to vision processors\",\"authors\":\"A. M. Alvarez, L. Reyneri, F.J.P. Valle\",\"doi\":\"10.1109/MELCON.2006.1653045\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present a tool devised for the automatic design and optimization of bioinspired visual processing models using reconfigurable hardware. We have focused on the simulation and optimization characteristics of our system. We also present a retina-like processing system based on a PCI-based FPGA board as an example. The whole system is intended for the design and analysis of real-time vision processing schemes. The top-down design path of our system involves a high level synthesis scheme while allowing different strategies for optimizing the system via the CodeSimulink codesign tool\",\"PeriodicalId\":299928,\"journal\":{\"name\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MELCON.2006.1653045\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2006.1653045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automatic synthesis of data-flow systems using high level codesign tool. Application to vision processors
In this paper, we present a tool devised for the automatic design and optimization of bioinspired visual processing models using reconfigurable hardware. We have focused on the simulation and optimization characteristics of our system. We also present a retina-like processing system based on a PCI-based FPGA board as an example. The whole system is intended for the design and analysis of real-time vision processing schemes. The top-down design path of our system involves a high level synthesis scheme while allowing different strategies for optimizing the system via the CodeSimulink codesign tool