{"title":"90nm CMOS宽锁定范围低功耗v带分频器","authors":"Q. Gu, Zhiwei Xu, M. Chang","doi":"10.1109/VLSIC.2007.4342745","DOIUrl":null,"url":null,"abstract":"A new topology for injection locked frequency divider (ILFD) is proposed to achieve high speed, wide locking range and quadrature phase operation. The dividing mechanism is analyzed and agrees well with the simulation. A prototype is implemented in TSMC 90 nm CMOS and realizes 4 GHz locking range (55.8 GHz-59.8 GHz) with -3 dBm input power and 5 mW DC power consumption. The divider attains the widest locking range with the lowest power consumption to date for V-band frequency dividing applications.","PeriodicalId":261092,"journal":{"name":"2007 IEEE Symposium on VLSI Circuits","volume":"53 6","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A Wide Locking Range and Low Power V-band Frequency Divider in 90nm CMOS\",\"authors\":\"Q. Gu, Zhiwei Xu, M. Chang\",\"doi\":\"10.1109/VLSIC.2007.4342745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new topology for injection locked frequency divider (ILFD) is proposed to achieve high speed, wide locking range and quadrature phase operation. The dividing mechanism is analyzed and agrees well with the simulation. A prototype is implemented in TSMC 90 nm CMOS and realizes 4 GHz locking range (55.8 GHz-59.8 GHz) with -3 dBm input power and 5 mW DC power consumption. The divider attains the widest locking range with the lowest power consumption to date for V-band frequency dividing applications.\",\"PeriodicalId\":261092,\"journal\":{\"name\":\"2007 IEEE Symposium on VLSI Circuits\",\"volume\":\"53 6\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2007.4342745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2007.4342745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Wide Locking Range and Low Power V-band Frequency Divider in 90nm CMOS
A new topology for injection locked frequency divider (ILFD) is proposed to achieve high speed, wide locking range and quadrature phase operation. The dividing mechanism is analyzed and agrees well with the simulation. A prototype is implemented in TSMC 90 nm CMOS and realizes 4 GHz locking range (55.8 GHz-59.8 GHz) with -3 dBm input power and 5 mW DC power consumption. The divider attains the widest locking range with the lowest power consumption to date for V-band frequency dividing applications.
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