PCB PDN设计中的等效电感分析与量化

2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI) Pub Date : 2019-07-22 DOI:10.1109/ISEMC.2019.8825244

Yifan Ding, Biyao Zhao, Shuang Liang, S. Bai, S. Connor, M. Cocchini, B. Achkir, S. Scearce, E. Li, B. Archambeault, J. Fan, J. Drewniak

{"title":"PCB PDN设计中的等效电感分析与量化","authors":"Yifan Ding, Biyao Zhao, Shuang Liang, S. Bai, S. Connor, M. Cocchini, B. Achkir, S. Scearce, E. Li, B. Archambeault, J. Fan, J. Drewniak","doi":"10.1109/ISEMC.2019.8825244","DOIUrl":null,"url":null,"abstract":"Power Distribution Network (PDN) design is an important part of high-speed digital designs. In order to meet the need of high operation speed and low power voltage supply, the impedance of PDN should be lower than the target impedance of the design requirement. Decoupling capacitors are added on the PCB to lower the PDN impedance. The PCB PDN design is often guided by design rules and experience. In this paper, commonly-used PCB PDN designs are analyzed and categorized based on inductance contribution from specific portions of the current path. Then, the inductance components are quantified for different parts of the geometry in different designs.","PeriodicalId":137753,"journal":{"name":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Equivalent Inductance Analysis and Quantification for PCB PDN Design\",\"authors\":\"Yifan Ding, Biyao Zhao, Shuang Liang, S. Bai, S. Connor, M. Cocchini, B. Achkir, S. Scearce, E. Li, B. Archambeault, J. Fan, J. Drewniak\",\"doi\":\"10.1109/ISEMC.2019.8825244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power Distribution Network (PDN) design is an important part of high-speed digital designs. In order to meet the need of high operation speed and low power voltage supply, the impedance of PDN should be lower than the target impedance of the design requirement. Decoupling capacitors are added on the PCB to lower the PDN impedance. The PCB PDN design is often guided by design rules and experience. In this paper, commonly-used PCB PDN designs are analyzed and categorized based on inductance contribution from specific portions of the current path. Then, the inductance components are quantified for different parts of the geometry in different designs.\",\"PeriodicalId\":137753,\"journal\":{\"name\":\"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISEMC.2019.8825244\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISEMC.2019.8825244","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 6

摘要

配电网络(PDN)设计是高速数字化设计的重要组成部分。为了满足高运行速度和低功率电压供电的需要，PDN的阻抗应低于设计要求的目标阻抗。在PCB上增加去耦电容以降低PDN阻抗。PCB PDN设计往往以设计规则和经验为指导。本文根据电流路径中特定部分的电感贡献对常用PCB PDN设计进行了分析和分类。然后，对不同设计中不同几何形状部位的电感分量进行了量化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Equivalent Inductance Analysis and Quantification for PCB PDN Design

Power Distribution Network (PDN) design is an important part of high-speed digital designs. In order to meet the need of high operation speed and low power voltage supply, the impedance of PDN should be lower than the target impedance of the design requirement. Decoupling capacitors are added on the PCB to lower the PDN impedance. The PCB PDN design is often guided by design rules and experience. In this paper, commonly-used PCB PDN designs are analyzed and categorized based on inductance contribution from specific portions of the current path. Then, the inductance components are quantified for different parts of the geometry in different designs.

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2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)

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