内置自检大型嵌入式CMOS折叠pla

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers Pub Date : 1988-11-07 DOI:10.1109/ICCAD.1988.122501

R. Dandapani, R. K. Gulati, D. K. Goel

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引用次数: 5

摘要

提出了一种基于确定性、功能无关的结构方法的大型嵌入式CMOS折叠可编程逻辑阵列(PLAs)的内置自检(BIST)设计方法。与应用于相应的非折叠pla的确定性BIST方法相比，它只需要大约一半的测试时间和相当的面积开销。给出了卡在、桥接、交叉点和卡开故障的检测方法。

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Built-in self-test for large embedded CMOS folded PLAs

A built-in self-test (BIST) design method for large embedded CMOS folded programmable logic arrays (PLAs) is presented that is based on a deterministic, function-independent structural method. It requires about half the testing time and comparable area overhead of deterministic BIST methods applied to corresponding nonfolded PLAs. Tests to detect stuck-at, bridging, cross-point and stuck-open faults are given.<>

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来源期刊

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers

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