{"title":"一种用于可扩展相控阵的6 ~ 18 GHz可调谐并发双频接收器前端","authors":"Yu-Jiu Wang, S. Jeon, A. Babakhani, A. Hajimiri","doi":"10.1109/RFIC.2008.4561450","DOIUrl":null,"url":null,"abstract":"This paper presents a study and design of tunable concurrent dual-band receiver. Different system architectures and building blocks have been compared and analyzed. A tunable concurrent dual-band receiver front end has then been fabricated and characterized. It operates across a tri-tave 6-18 GHz bandwidth with a nominal 17-25 dB conversion gain, worst-case -15 dBm IIP3, and worst-case -24.5 dBm ICP 1 dB.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A 6-to-18 GHz tunable concurrent dual-band receiver front end for scalable phased arrays in 130nm CMOS\",\"authors\":\"Yu-Jiu Wang, S. Jeon, A. Babakhani, A. Hajimiri\",\"doi\":\"10.1109/RFIC.2008.4561450\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a study and design of tunable concurrent dual-band receiver. Different system architectures and building blocks have been compared and analyzed. A tunable concurrent dual-band receiver front end has then been fabricated and characterized. It operates across a tri-tave 6-18 GHz bandwidth with a nominal 17-25 dB conversion gain, worst-case -15 dBm IIP3, and worst-case -24.5 dBm ICP 1 dB.\",\"PeriodicalId\":253375,\"journal\":{\"name\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2008.4561450\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2008.4561450","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 6-to-18 GHz tunable concurrent dual-band receiver front end for scalable phased arrays in 130nm CMOS
This paper presents a study and design of tunable concurrent dual-band receiver. Different system architectures and building blocks have been compared and analyzed. A tunable concurrent dual-band receiver front end has then been fabricated and characterized. It operates across a tri-tave 6-18 GHz bandwidth with a nominal 17-25 dB conversion gain, worst-case -15 dBm IIP3, and worst-case -24.5 dBm ICP 1 dB.