在交钥匙专用集成电路环境中实现高性能、深亚微米设计的挑战

K. Shepard
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引用次数: 5

摘要

在本文中,我们回顾了在深亚微米技术中塑造高性能ASIC设计的趋势和技术。互连在确定性能方面的重要性正在打破逻辑和物理设计之间的明确划分,而噪声分析在确保正确功能方面变得与时序分析一样重要。预表征库中规则的日益复杂使得理解晶体管的分析工具更具吸引力。此外,新的布局技术允许动态创建库,为真正的晶体管级合成创造机会。Domino逻辑和通管电路有望在高端领域找到它们的合成方式,以满足日益增长的性能需求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The challenge of high-performance, deep-submicron design in a turnkey ASIC environment
In this paper, we review the trends and techniques that are shaping high-performance ASIC design in deep-submicron technology. The importance of interconnect in determining performance is breaking the clean division between logical and physical design, while noise analysis is becoming as important as timing analysis in ensuring correct functionality. The growing complexity of rules in precharacterized libraries is making analysis tools that understand transistors more attractive. In addition, new layout techniques allow libraries to be created dynamically, creating the opportunity for truly transistor-level synthesis. Domino logic and pass-transistor circuits promise to find their way into synthesis with increasing performance demands at the high end.
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