Survey of the State of the Art of Electrical Transient Upset in Digital Circuits

A survey was conducted to assess the present upset technology status. Upset is defined as the malfunction of a circuit or system due to interference. This paper focuses on the malfunction of digital circuits due to electrical transients that cause nonpermanent undesirable logic states which show up in the output as errors. As integrated circuits are being made more dense, their susceptibility to upset is increasing. Thus, upset, which may be induced at far lower levels than damage, demands attention. Knowledge voids that were identified in this investigation of upset must be resolved. Although this survey concentrates on upset due to the electromagnetic pulse (EMP) type of transients, in the process it sorts through other types of upset as they relate to it. The survey results increase the need for a basic upset test which should lead to a systematic characterization of upset due to EMP. The test results should be fundamental building blocks in the computer modeling of circuit response to transient drivers, in addition to aiding in the prediction of the stochastic response of systems to known transients.