Novel Memristor-based Nonvolatile D Latch and Flip-flop Designs

Sequential devices are the fundamental building blocks for almost all digital electronic systems with memory. Due to the importance of instant data recovery after unexpected data loss such as unplanned power down, sequential devices need to have the nonvolatile property, which motivates the recent research and practice in integrating the nonvolatile memristor into CMOS devices. In this paper, we study how to apply this approach to improve the quality of nonvolatile D latch. Unlike the structure of conventional design, the proposed D latch consists of only one memristor, several transmission gates, and CMOS inverters. Our design overcomes the negative effect due to the threshold loss of the transistors. As simulation shows, compared with the current designs, our proposed memristor-based D latch can support the memristor to switch between different resistance states 2.3X-3.6X faster, and thus achieving a clock of higher frequency. In addition, our design allows the threshold value of the memristor to be selected from a much wider range. As an application, we use the proposed memristor-based D latch to implement a nonvolatile master-slave D flip-flop, which has smaller delay than all the state-of the-art designs and smaller area than all but one of them. Our designs improve the quality of memristor-based D latch and D flip-flop in terms of latency, area, and flexibility of threshold voltage selection, making them a promising option for data backup in real life systems.