T. Mitomo, R. Fujimoto, N. Ono, R. Tachibana, H. Hoshino, Y. Yoshihara, Y. Tsutsumi, I. Seto
{"title":"带频率合成器的60ghz CMOS接收机","authors":"T. Mitomo, R. Fujimoto, N. Ono, R. Tachibana, H. Hoshino, Y. Yoshihara, Y. Tsutsumi, I. Seto","doi":"10.1109/VLSIC.2007.4342702","DOIUrl":null,"url":null,"abstract":"A 60-GHz receiver (RX) chip fabricated in 90 nm CMOS process is reported. The RX chip consists of an LNA, a downconversion mixer and a phase-locked loop synthesizer. The RX chip is capable of generating LO signal from phase-locked synthesizer. Measured power gain and NF of 22 dB and 8.4 dB were obtained at 61.5 GHz. These results indicate the possibility of realization of CMOS single-chip 60-GHz transceiver.","PeriodicalId":261092,"journal":{"name":"2007 IEEE Symposium on VLSI Circuits","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":"{\"title\":\"A 60-GHz CMOS Receiver with Frequency Synthesizer\",\"authors\":\"T. Mitomo, R. Fujimoto, N. Ono, R. Tachibana, H. Hoshino, Y. Yoshihara, Y. Tsutsumi, I. Seto\",\"doi\":\"10.1109/VLSIC.2007.4342702\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 60-GHz receiver (RX) chip fabricated in 90 nm CMOS process is reported. The RX chip consists of an LNA, a downconversion mixer and a phase-locked loop synthesizer. The RX chip is capable of generating LO signal from phase-locked synthesizer. Measured power gain and NF of 22 dB and 8.4 dB were obtained at 61.5 GHz. These results indicate the possibility of realization of CMOS single-chip 60-GHz transceiver.\",\"PeriodicalId\":261092,\"journal\":{\"name\":\"2007 IEEE Symposium on VLSI Circuits\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"27\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2007.4342702\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2007.4342702","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 60-GHz receiver (RX) chip fabricated in 90 nm CMOS process is reported. The RX chip consists of an LNA, a downconversion mixer and a phase-locked loop synthesizer. The RX chip is capable of generating LO signal from phase-locked synthesizer. Measured power gain and NF of 22 dB and 8.4 dB were obtained at 61.5 GHz. These results indicate the possibility of realization of CMOS single-chip 60-GHz transceiver.
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