通过插入氧化物FinFET技术实现高密度SRAM电压缩放

2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) Pub Date : 2017-10-01 DOI:10.1109/S3S.2017.8309217

Yi-Ting Wu, M. Chiang, Jone F. Chen, F. Ding, D. Connelly, T. Liu

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引用次数: 2

摘要

提出了一种精确调整插入氧化物FinFET (iFinFET)驱动强度的方案，以提高最小尺寸六晶体管SRAM单元的制造成品率。具体来说，iFinFET中的顶部纳米线(NW)通道可以通过离子注入来增加其阈值电压，并且可以优化插入氧化物层的位置，以在低工作电压下获得最大的电池产量。通过三维(3-D)器件模拟和校准的紧凑模型，该方案预计可降低最小尺寸6-T SRAM单元的最小工作电压(Vmin)。

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High-density SRAM voltage scaling enabled by inserted-oxide FinFET technology

A scheme to precisely adjust the drive strength of an inserted-oxide FinFET (iFinFET), to enhance the manufacturing yield of a minimally sized six-transistor (6-T) SRAM cell, is proposed. Specifically, the top nanowire (NW) channel in an iFinFET can be made to be essentially non-conducting by ion implantation to increase its threshold voltage, and the position of the inserted-oxide layer can be optimized for maximum cell yield at low operating voltage. Via three-dimensional (3-D) device simulations and a calibrated compact model, this scheme is projected to lower the minimum operating voltage (Vmin) of a minimally sized 6-T SRAM cell.

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来源期刊

2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

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