{"title":"一种0.3 μA无静态电流输出电容的动态摆率增强缓冲LDO","authors":"Tianxiang Wu, Yuting Zhang, Yanhan Zeng","doi":"10.1109/APCCAS55924.2022.10090347","DOIUrl":null,"url":null,"abstract":"This paper presents a low quiescent current, fast transient response output capacitor-less LDO implemented in a 180nm standard CMOS technology. A dynamic slew rate enhance buffer with transient spike detecting is proposed to improve the load transient response. Besides, a low power class-AB amplifier with gain enhance transistors is used to keep high loop gain for good regulated performance. According to the simulation result, the quiescent current of the LDO is only 283nA. Meanwhile, when the load current steps from 1 mA to 15 mA with a 300-ns edge time and a 0-pF output capacitor, the transient ripple is only 141.9 mV. Besides, the line regulation is only 0.305 mV/V and the load regulation is only 17.79 $\\mu \\mathbf{V/mA}$.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 0.3-μA Quiescent Current Output Capacitor-Less LDO with Dynamic Slew Rate Enhance Buffer\",\"authors\":\"Tianxiang Wu, Yuting Zhang, Yanhan Zeng\",\"doi\":\"10.1109/APCCAS55924.2022.10090347\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low quiescent current, fast transient response output capacitor-less LDO implemented in a 180nm standard CMOS technology. A dynamic slew rate enhance buffer with transient spike detecting is proposed to improve the load transient response. Besides, a low power class-AB amplifier with gain enhance transistors is used to keep high loop gain for good regulated performance. According to the simulation result, the quiescent current of the LDO is only 283nA. Meanwhile, when the load current steps from 1 mA to 15 mA with a 300-ns edge time and a 0-pF output capacitor, the transient ripple is only 141.9 mV. Besides, the line regulation is only 0.305 mV/V and the load regulation is only 17.79 $\\\\mu \\\\mathbf{V/mA}$.\",\"PeriodicalId\":243739,\"journal\":{\"name\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS55924.2022.10090347\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090347","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.3-μA Quiescent Current Output Capacitor-Less LDO with Dynamic Slew Rate Enhance Buffer
This paper presents a low quiescent current, fast transient response output capacitor-less LDO implemented in a 180nm standard CMOS technology. A dynamic slew rate enhance buffer with transient spike detecting is proposed to improve the load transient response. Besides, a low power class-AB amplifier with gain enhance transistors is used to keep high loop gain for good regulated performance. According to the simulation result, the quiescent current of the LDO is only 283nA. Meanwhile, when the load current steps from 1 mA to 15 mA with a 300-ns edge time and a 0-pF output capacitor, the transient ripple is only 141.9 mV. Besides, the line regulation is only 0.305 mV/V and the load regulation is only 17.79 $\mu \mathbf{V/mA}$.
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