一个8位，每秒2千兆样本的模拟到数字转换器

GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI:10.1109/GAAS.1995.529016

K. Nary, R. Nubling, S. Beccue, W. T. Colleran, J. Penney, Keh-Chung Wang

{"title":"一个8位，每秒2千兆样本的模拟到数字转换器","authors":"K. Nary, R. Nubling, S. Beccue, W. T. Colleran, J. Penney, Keh-Chung Wang","doi":"10.1109/GAAS.1995.529016","DOIUrl":null,"url":null,"abstract":"We report on an 8-bit, 2 gigasample per second analog to digital converter (ADC) fabricated in an AlGaAs-GaAs heterojunction bipolar transistor (HBT) process. The ADC utilizes a folding and interpolation architecture to provide wide bandwidth with a moderate device count. When sampling at 2 gigasamples per second (GS/s), the ADC has demonstrated an effective resolution of between 6.5 and 7.0 effective bits for analog inputs between DC and 1.5 GHz and a single tone spurious free dynamic range of 48 dB at Nyquist. The ADC incorporates over 2500 transistors and dissipates 5.3 Watts from 5.0 V and -5.2 V supplies.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"65 5","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"33","resultStr":"{\"title\":\"An 8-bit, 2 gigasample per second analog to digital converter\",\"authors\":\"K. Nary, R. Nubling, S. Beccue, W. T. Colleran, J. Penney, Keh-Chung Wang\",\"doi\":\"10.1109/GAAS.1995.529016\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on an 8-bit, 2 gigasample per second analog to digital converter (ADC) fabricated in an AlGaAs-GaAs heterojunction bipolar transistor (HBT) process. The ADC utilizes a folding and interpolation architecture to provide wide bandwidth with a moderate device count. When sampling at 2 gigasamples per second (GS/s), the ADC has demonstrated an effective resolution of between 6.5 and 7.0 effective bits for analog inputs between DC and 1.5 GHz and a single tone spurious free dynamic range of 48 dB at Nyquist. The ADC incorporates over 2500 transistors and dissipates 5.3 Watts from 5.0 V and -5.2 V supplies.\",\"PeriodicalId\":422183,\"journal\":{\"name\":\"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995\",\"volume\":\"65 5\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"33\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.1995.529016\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1995.529016","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 33

摘要

我们报道了一种用AlGaAs-GaAs异质结双极晶体管(HBT)工艺制造的8位，每秒2千兆样本的模数转换器(ADC)。ADC采用折叠和插值架构，以中等的器件数量提供宽带宽。当采样速度为每秒2千兆样本(GS/s)时，ADC在DC和1.5 GHz之间的模拟输入和奈奎斯特48 dB的单音无杂散动态范围内显示了6.5到7.0有效位的有效分辨率。ADC集成了2500多个晶体管，从5.0 V和-5.2 V电源消耗5.3瓦。

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An 8-bit, 2 gigasample per second analog to digital converter

We report on an 8-bit, 2 gigasample per second analog to digital converter (ADC) fabricated in an AlGaAs-GaAs heterojunction bipolar transistor (HBT) process. The ADC utilizes a folding and interpolation architecture to provide wide bandwidth with a moderate device count. When sampling at 2 gigasamples per second (GS/s), the ADC has demonstrated an effective resolution of between 6.5 and 7.0 effective bits for analog inputs between DC and 1.5 GHz and a single tone spurious free dynamic range of 48 dB at Nyquist. The ADC incorporates over 2500 transistors and dissipates 5.3 Watts from 5.0 V and -5.2 V supplies.

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GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995

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