通过可重构硬件进行空气动力学分析加速

E. Andrés, M. Molina, G. Botella, A. D. Del Barrio, J. Mendias
{"title":"通过可重构硬件进行空气动力学分析加速","authors":"E. Andrés, M. Molina, G. Botella, A. D. Del Barrio, J. Mendias","doi":"10.1109/SPL.2008.4547740","DOIUrl":null,"url":null,"abstract":"The long computation times required to simulate complete aircraft configurations remain as the main bottleneck in the design flow of new structures for the aeronautics industry. In this paper, the novel application of specific hardware in conjunction with conventional processors to accelerate Computational fluid dynamics is explored. First, some general facts about application-specific hardware are presented, placing the focus on the feasibility of the development of hardware modules (FPGAs based) for the acceleration of most time-consuming algorithms in aeronautics analysis. So, a practical methodology for developing an FPGA- based computing solution for the quasi ID Euler equations is applied to the Sod's \"shock tube\" problem. Results comparing CPU-based and FPGA-based solutions are presented, showing that speedups around two orders of magnitude can be expected from the FPGA-based implementation.","PeriodicalId":372678,"journal":{"name":"2008 4th Southern Conference on Programmable Logic","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Aerodynamics Analysis Acceleration through Reconfigurable Hardware\",\"authors\":\"E. Andrés, M. Molina, G. Botella, A. D. Del Barrio, J. Mendias\",\"doi\":\"10.1109/SPL.2008.4547740\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The long computation times required to simulate complete aircraft configurations remain as the main bottleneck in the design flow of new structures for the aeronautics industry. In this paper, the novel application of specific hardware in conjunction with conventional processors to accelerate Computational fluid dynamics is explored. First, some general facts about application-specific hardware are presented, placing the focus on the feasibility of the development of hardware modules (FPGAs based) for the acceleration of most time-consuming algorithms in aeronautics analysis. So, a practical methodology for developing an FPGA- based computing solution for the quasi ID Euler equations is applied to the Sod's \\\"shock tube\\\" problem. Results comparing CPU-based and FPGA-based solutions are presented, showing that speedups around two orders of magnitude can be expected from the FPGA-based implementation.\",\"PeriodicalId\":372678,\"journal\":{\"name\":\"2008 4th Southern Conference on Programmable Logic\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-03-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 4th Southern Conference on Programmable Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPL.2008.4547740\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 4th Southern Conference on Programmable Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2008.4547740","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

摘要

模拟完整飞机构型所需的长计算时间仍然是航空工业新结构设计流程的主要瓶颈。本文探讨了特定硬件与传统处理器相结合的新应用,以加速计算流体动力学。首先,介绍了一些关于特定应用硬件的一般事实,将重点放在硬件模块(基于fpga)开发的可行性上,以加速航空分析中最耗时的算法。因此,将一种实用的方法用于开发基于FPGA的准ID欧拉方程计算解决方案,并将其应用于Sod的“激波管”问题。给出了基于cpu和基于fpga的解决方案的比较结果,表明基于fpga的实现可以预期大约两个数量级的速度提升。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Aerodynamics Analysis Acceleration through Reconfigurable Hardware
The long computation times required to simulate complete aircraft configurations remain as the main bottleneck in the design flow of new structures for the aeronautics industry. In this paper, the novel application of specific hardware in conjunction with conventional processors to accelerate Computational fluid dynamics is explored. First, some general facts about application-specific hardware are presented, placing the focus on the feasibility of the development of hardware modules (FPGAs based) for the acceleration of most time-consuming algorithms in aeronautics analysis. So, a practical methodology for developing an FPGA- based computing solution for the quasi ID Euler equations is applied to the Sod's "shock tube" problem. Results comparing CPU-based and FPGA-based solutions are presented, showing that speedups around two orders of magnitude can be expected from the FPGA-based implementation.
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