Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-in Mak, R. Martins
{"title":"基于开关电容的低功耗语音关键字模拟特征提取器的设计与实现","authors":"Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-in Mak, R. Martins","doi":"10.1109/APCCAS55924.2022.10090360","DOIUrl":null,"url":null,"abstract":"A low-power keyword spotting (KWS) is demanding for the smart human-device interface. The conventional analog feature extractor utilizes an analog filter bank that consumes large power and area. This paper presents a KWS with a low-power switched-capacitor-based feature extractor. The feature extractor employs two pipelining time-domain convolutional neural networks (TD-CNNs) to extract sufficient features for KWS. The TD-CNNs utilize sparsity aware computation (SAC) and sparsified quantization (SQ) for a 4-bit weight quantization. The features are quantized to 2-bit for further classification by an off-chip deep neural network. The analog feature extractor is designed in a 55-nm CMOS process and post-layout simulation is provided. It consumes 4.4 µW at a 1.2-V power supply, with an area of 0.39 mm2. It achieves an accuracy of 92.2% for the google command dataset (GSCD) with five classes.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting\",\"authors\":\"Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-in Mak, R. Martins\",\"doi\":\"10.1109/APCCAS55924.2022.10090360\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power keyword spotting (KWS) is demanding for the smart human-device interface. The conventional analog feature extractor utilizes an analog filter bank that consumes large power and area. This paper presents a KWS with a low-power switched-capacitor-based feature extractor. The feature extractor employs two pipelining time-domain convolutional neural networks (TD-CNNs) to extract sufficient features for KWS. The TD-CNNs utilize sparsity aware computation (SAC) and sparsified quantization (SQ) for a 4-bit weight quantization. The features are quantized to 2-bit for further classification by an off-chip deep neural network. The analog feature extractor is designed in a 55-nm CMOS process and post-layout simulation is provided. It consumes 4.4 µW at a 1.2-V power supply, with an area of 0.39 mm2. It achieves an accuracy of 92.2% for the google command dataset (GSCD) with five classes.\",\"PeriodicalId\":243739,\"journal\":{\"name\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS55924.2022.10090360\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090360","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting
A low-power keyword spotting (KWS) is demanding for the smart human-device interface. The conventional analog feature extractor utilizes an analog filter bank that consumes large power and area. This paper presents a KWS with a low-power switched-capacitor-based feature extractor. The feature extractor employs two pipelining time-domain convolutional neural networks (TD-CNNs) to extract sufficient features for KWS. The TD-CNNs utilize sparsity aware computation (SAC) and sparsified quantization (SQ) for a 4-bit weight quantization. The features are quantized to 2-bit for further classification by an off-chip deep neural network. The analog feature extractor is designed in a 55-nm CMOS process and post-layout simulation is provided. It consumes 4.4 µW at a 1.2-V power supply, with an area of 0.39 mm2. It achieves an accuracy of 92.2% for the google command dataset (GSCD) with five classes.