自适应交流/直流输出缓冲器，减少地面反弹和输出振铃

Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434) Pub Date : 2000-08-28 DOI:10.1109/APASIC.2000.896909

S. Jou, Shu-Hua Kuo, J. Chiu, V. Lin

{"title":"自适应交流/直流输出缓冲器，减少地面反弹和输出振铃","authors":"S. Jou, Shu-Hua Kuo, J. Chiu, V. Lin","doi":"10.1109/APASIC.2000.896909","DOIUrl":null,"url":null,"abstract":"A CMOS output buffer with AC and DC stages and adaptively feedback control scheme is proposed. Implementation results show that it can reduce the output ring by 60%, power/GND line bounce by 40% for the case of 2 ns rise and fall time with 40 pF output loading.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"28 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Adaptive AC/DC output buffer with reduced ground bounce and output ringing\",\"authors\":\"S. Jou, Shu-Hua Kuo, J. Chiu, V. Lin\",\"doi\":\"10.1109/APASIC.2000.896909\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A CMOS output buffer with AC and DC stages and adaptively feedback control scheme is proposed. Implementation results show that it can reduce the output ring by 60%, power/GND line bounce by 40% for the case of 2 ns rise and fall time with 40 pF output loading.\",\"PeriodicalId\":313978,\"journal\":{\"name\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"volume\":\"28 3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.2000.896909\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896909","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

提出了一种交直流级CMOS输出缓冲器和自适应反馈控制方案。实现结果表明，在40pf输出负载下，在上升和下降时间为2ns的情况下，输出环减少60%，电源/地线反弹减少40%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Adaptive AC/DC output buffer with reduced ground bounce and output ringing

A CMOS output buffer with AC and DC stages and adaptively feedback control scheme is proposed. Implementation results show that it can reduce the output ring by 60%, power/GND line bounce by 40% for the case of 2 ns rise and fall time with 40 pF output loading.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)

自引率

0.00%

发文量