一种完全自检电路的概率测量方法

Jien-Chung Lo, E. Fujiwara
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引用次数: 9

摘要

提出了一种完全自检电路的概率测量方法。这种度量类似于容错系统的可靠性,定义为实现TSC目标(PATG)的概率。在确定电路在给定应用环境中的适用性方面,PATG超越了TSC定义。例如,在四个码字输入中有两个不可用的情况下,嵌入式TSC双轨检查器比理想情况下获得更高的PATG。本文还证明了将PATG概念扩展到强故障安全(SFS)电路和强码分离(SCD)检查器。PATG可用于产品规格,类似于可靠性,可以对TSC电路的故障/错误处理性能给出精确的行为描述。这是迈向TSC或CED电路实际应用的关键一步。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A probabilistic measurement for totally self-checking circuits
The authors propose a probabilistic measurement for totally self-checking (TSC) circuits. This measurement is analogous to reliability of fault-tolerant systems and is defined as the probability of achieving TSC goal (PATG). PATG surpasses the TSC definitions in determining the applicability of a circuit in a given application environment. For example, it is shown that an embedded TSC two-rail checker with two out of its four code word inputs unavailable gains a higher PATG than that in the ideal case. It is also demonstrated that the extension of PATG concept to strongly fault-secure (SFS) circuits and strongly code disjoint (SCD) checkers. The PATG can be used in product specification, analogous to reliability, and can give precise behavioral description on fault/error handling performance of TSC circuits. This is a crucial step toward the practical applications of TSC or CED circuits.
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