{"title":"一种完全自检电路的概率测量方法","authors":"Jien-Chung Lo, E. Fujiwara","doi":"10.1109/DFTVS.1993.595821","DOIUrl":null,"url":null,"abstract":"The authors propose a probabilistic measurement for totally self-checking (TSC) circuits. This measurement is analogous to reliability of fault-tolerant systems and is defined as the probability of achieving TSC goal (PATG). PATG surpasses the TSC definitions in determining the applicability of a circuit in a given application environment. For example, it is shown that an embedded TSC two-rail checker with two out of its four code word inputs unavailable gains a higher PATG than that in the ideal case. It is also demonstrated that the extension of PATG concept to strongly fault-secure (SFS) circuits and strongly code disjoint (SCD) checkers. The PATG can be used in product specification, analogous to reliability, and can give precise behavioral description on fault/error handling performance of TSC circuits. This is a crucial step toward the practical applications of TSC or CED circuits.","PeriodicalId":213798,"journal":{"name":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A probabilistic measurement for totally self-checking circuits\",\"authors\":\"Jien-Chung Lo, E. Fujiwara\",\"doi\":\"10.1109/DFTVS.1993.595821\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors propose a probabilistic measurement for totally self-checking (TSC) circuits. This measurement is analogous to reliability of fault-tolerant systems and is defined as the probability of achieving TSC goal (PATG). PATG surpasses the TSC definitions in determining the applicability of a circuit in a given application environment. For example, it is shown that an embedded TSC two-rail checker with two out of its four code word inputs unavailable gains a higher PATG than that in the ideal case. It is also demonstrated that the extension of PATG concept to strongly fault-secure (SFS) circuits and strongly code disjoint (SCD) checkers. The PATG can be used in product specification, analogous to reliability, and can give precise behavioral description on fault/error handling performance of TSC circuits. This is a crucial step toward the practical applications of TSC or CED circuits.\",\"PeriodicalId\":213798,\"journal\":{\"name\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1993.595821\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1993.595821","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A probabilistic measurement for totally self-checking circuits
The authors propose a probabilistic measurement for totally self-checking (TSC) circuits. This measurement is analogous to reliability of fault-tolerant systems and is defined as the probability of achieving TSC goal (PATG). PATG surpasses the TSC definitions in determining the applicability of a circuit in a given application environment. For example, it is shown that an embedded TSC two-rail checker with two out of its four code word inputs unavailable gains a higher PATG than that in the ideal case. It is also demonstrated that the extension of PATG concept to strongly fault-secure (SFS) circuits and strongly code disjoint (SCD) checkers. The PATG can be used in product specification, analogous to reliability, and can give precise behavioral description on fault/error handling performance of TSC circuits. This is a crucial step toward the practical applications of TSC or CED circuits.