{"title":"用于2.4 ghz无线传感器网络应用的0.5V CMOS LNA","authors":"Liang Chen, Zhiqun Li, Zhigong Wang","doi":"10.1109/ISSSE.2010.5607033","DOIUrl":null,"url":null,"abstract":"This study was initiated to design a low noise amplifier (LNA), which could work with ultra low voltage of 0.5V and was optimized for WSN application using SMIC 0.13μm RF-CMOS technology. The topology of differential inductance degenerated folded cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique was adopted. Chosen circuit demonstrated a power gain of 16.5dB, consuming 3.3mW DC power, showing 0.78dB NF and an input 1-dB compression point of −20.9dBm. Both input match (S11) and output match (S22) were below −19dB. The results indicate that this LNA is fully applicable to the low voltage and low power application.","PeriodicalId":211786,"journal":{"name":"2010 International Symposium on Signals, Systems and Electronics","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 0.5V CMOS LNA for 2.4-GHz WSN application\",\"authors\":\"Liang Chen, Zhiqun Li, Zhigong Wang\",\"doi\":\"10.1109/ISSSE.2010.5607033\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This study was initiated to design a low noise amplifier (LNA), which could work with ultra low voltage of 0.5V and was optimized for WSN application using SMIC 0.13μm RF-CMOS technology. The topology of differential inductance degenerated folded cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique was adopted. Chosen circuit demonstrated a power gain of 16.5dB, consuming 3.3mW DC power, showing 0.78dB NF and an input 1-dB compression point of −20.9dBm. Both input match (S11) and output match (S22) were below −19dB. The results indicate that this LNA is fully applicable to the low voltage and low power application.\",\"PeriodicalId\":211786,\"journal\":{\"name\":\"2010 International Symposium on Signals, Systems and Electronics\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Symposium on Signals, Systems and Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSSE.2010.5607033\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Symposium on Signals, Systems and Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSSE.2010.5607033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This study was initiated to design a low noise amplifier (LNA), which could work with ultra low voltage of 0.5V and was optimized for WSN application using SMIC 0.13μm RF-CMOS technology. The topology of differential inductance degenerated folded cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique was adopted. Chosen circuit demonstrated a power gain of 16.5dB, consuming 3.3mW DC power, showing 0.78dB NF and an input 1-dB compression point of −20.9dBm. Both input match (S11) and output match (S22) were below −19dB. The results indicate that this LNA is fully applicable to the low voltage and low power application.