采用插值角度旋转算法的16b正交直接数字频率合成器

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) Pub Date : 2002-06-13 DOI:10.1109/VLSIC.2002.1015069

Yongchul Song, Beomsup Kim

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引用次数: 18

摘要

采用一种新的相正弦转换算法，在0.35 /spl mu/m CMOS上制作了正交直接数字频率合成器(DDFS)。它通过小型查找表和适当的算术硬件实现了96 dB的无杂散动态范围(SFDR)。原型DDFS IC产生16个余弦和正弦输出，输出频率调谐分辨率为0.03 Hz。它工作在150mhz的采样率，消耗670兆瓦。

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A 16 b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm

A quadrature direct digital frequency synthesizer (DDFS) is fabricated in 0.35 /spl mu/m CMOS using a new phase-to-sine conversion algorithm. It achieves a spurious-free dynamic range (SFDR) of 96 dB with small-sized lookup tables and appropriate arithmetic hardware. The prototype DDFS IC generates 16 b cosine and sine outputs with an output frequency tuning resolution of 0.03 Hz. It works at 150 MHz sampling rate, consuming 670 mW.

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2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)

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