Mooni Rahul, V. Vaishnavi, Kasthuri Vyshnavi, Chandramauleshwar Roy
{"title":"功率感知10T静态随机存取存储器设计","authors":"Mooni Rahul, V. Vaishnavi, Kasthuri Vyshnavi, Chandramauleshwar Roy","doi":"10.1109/ViTECoN58111.2023.10157217","DOIUrl":null,"url":null,"abstract":"Our proposed 10T (PROP10T) SRAM cell is presented in this article. The important design metrics are assessed using HSPICE Monte Carlo Simulations. In our proposed 10T SRAM cell. The estimated results of PROP10T Static RAM cell are contrasted with the conventional 6T (CONV6T) and conventional 8T (CONV8T) Static RAM cell. Compared to the CONV6T and CONV8T, the PROP10T has demonstrated shorter read delay (TRA). The write delay (TWA) of PROP10T is now almost 4 times faster than CONV6and T's 1.2 times faster than CONV8 T's. On CONV6T and CONV8T, respectively, the proposed design improves RSNM (read static noise margin) by 3.1 and 2 dB [1].","PeriodicalId":407488,"journal":{"name":"2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Power Aware 10T Static Random-Access Memory Design\",\"authors\":\"Mooni Rahul, V. Vaishnavi, Kasthuri Vyshnavi, Chandramauleshwar Roy\",\"doi\":\"10.1109/ViTECoN58111.2023.10157217\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Our proposed 10T (PROP10T) SRAM cell is presented in this article. The important design metrics are assessed using HSPICE Monte Carlo Simulations. In our proposed 10T SRAM cell. The estimated results of PROP10T Static RAM cell are contrasted with the conventional 6T (CONV6T) and conventional 8T (CONV8T) Static RAM cell. Compared to the CONV6T and CONV8T, the PROP10T has demonstrated shorter read delay (TRA). The write delay (TWA) of PROP10T is now almost 4 times faster than CONV6and T's 1.2 times faster than CONV8 T's. On CONV6T and CONV8T, respectively, the proposed design improves RSNM (read static noise margin) by 3.1 and 2 dB [1].\",\"PeriodicalId\":407488,\"journal\":{\"name\":\"2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ViTECoN58111.2023.10157217\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ViTECoN58111.2023.10157217","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power Aware 10T Static Random-Access Memory Design
Our proposed 10T (PROP10T) SRAM cell is presented in this article. The important design metrics are assessed using HSPICE Monte Carlo Simulations. In our proposed 10T SRAM cell. The estimated results of PROP10T Static RAM cell are contrasted with the conventional 6T (CONV6T) and conventional 8T (CONV8T) Static RAM cell. Compared to the CONV6T and CONV8T, the PROP10T has demonstrated shorter read delay (TRA). The write delay (TWA) of PROP10T is now almost 4 times faster than CONV6and T's 1.2 times faster than CONV8 T's. On CONV6T and CONV8T, respectively, the proposed design improves RSNM (read static noise margin) by 3.1 and 2 dB [1].