DS/CDMA系统中的同步采样和基于信噪比的增益控制

You-Hsien Lin, Shih-Lin Lo, Wei-Chi Lai, Ta-Yang Juan, Terng-Yin Hsu
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引用次数: 0

摘要

时序同步是接收机从采样数字波形中恢复数据的重要组成部分。为了实现直接序列/码分多址(DS/CDMA)系统在频率选择衰落信道上的快速时序采集,提出了一种基于双相关差分(DCD)采集和自动增益控制器(AGC)作用的同步采样恢复方法。它测量接收到的DCD差分功率,以确定基于全数字相位插值器的多相发生器的良好采样相位。该方案可在频率选择性衰落信道下耐受+ 50ppm的系统时钟偏移(SCO)。因此,我们不仅要快速确定良好的采样相位,而且要在DS/CDMA系统中实现具有AGC控制器的稳定变增益放大器(VGA)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Synchronous Sampling and SNR-Based Gain Control in DS/CDMA Systems
Timing synchronization is an important component in a receiver designed to recover data form sampling digital waveform. A synchronous sampling recovery with dual correlator differential (DCD) based acquisition with effects of auto-gain controller (AGC) is proposed to achieve fast timing acquisition for direct sequence / code division multiple access (DS/CDMA) system over frequency-selective fading channel in this paper. It measures both received DCD difference power to determine the good sampling phase from an all-digital phase interpolator based multiphase generator. This solution can tolerate + 50ppm system clock offset (SCO) under frequency-selective fading channel. Hence, we not only to determine the good sampling phase fast, but also to arrive stable variable gain amplifier (VGA) with AGC controller in DS/CDMA system approaches.
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