集成低温量子控制系统的系统设计方法

M. Prathapan, P. Mueller, David Heim, Maria Vittoria Oropallo, M. Brändli, P. Francese, M. Kossel, A. Ruffino, C. Zota, E. Cha, T. Morf
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引用次数: 1

摘要

在本文中,我们提供了一个系统级的角度来设计大规模量子系统的控制电子器件。具有高保真控制和读出、相干耦合、校准门和具有低错误率的可重构电路的量子计算系统有望具有优越的量子体积。低温CMOS通过最小化特征尺寸、降低成本、功耗和实现低延迟纠错,在可扩展量子计算机的实现中起着至关重要的作用。我们实现基于可扩展反馈的控制系统的方法包括基于存储器的任意波形发生器(AWG)的设计,宽带射频模拟数字转换器,集成放大器链以及可以与门序列同步的状态鉴别器。数字辅助设计,当实现在先进的CMOS节点,如7nm,可以获得低功耗的好处,由于缩放。量子位读出链在数字化之前需要几个放大阶段。我们建议将我们内部开发的InP HEMT LNAs与CMOS LNA级协整,以最小的面积在数字化仪输入处实现所需的增益。我们的方法在HEMT LNA和低温CMOS接收器之间使用高阻抗匹配,可以放松基于逆变器的CMOS LNA的设计限制,为完全集成的量子比特读出链铺平道路。量子比特状态鉴别器由一个数字信号处理器组成,该处理器从数字化仪输出和预先确定的阈值计算量子比特状态。该系统通过与室温电子器件的串行接口实现基于反馈的最优控制,以减小误差并降低所需的数据速率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A system design approach toward integrated cryogenic quantum control systems
In this paper, we provide a system level perspective on the design of control electronics for large scale quantum systems. Quantum computing systems with high-fidelity control and readout, coherent coupling, calibrated gates, and reconfigurable circuits with low error rates are expected to have superior quantum volumes. Cryogenic CMOS plays a crucial role in the realization of scalable quantum computers, by minimizing the feature size, lowering the cost, power consumption, and implementing low latency error correction. Our approach toward achieving scalable feed-back based control systems includes the design of memory based arbitrary waveform generators (AWG’s), wide band radio frequency analog to digital converters, integrated amplifier chain, and state discriminators that can be synchronized with gate sequences. Digitally assisted designs, when implemented in an advanced CMOS node such as 7 nm can reap the benefits of low power due to scaling. A qubit readout chain demands several amplification stages before the digitizer. We propose the co-integration of our in-house developed InP HEMT LNAs with CMOS LNA stages to achieve the required gain at the digitizer input with minimal area. Our approach using high impedance matching between the HEMT LNA and the cryogenic CMOS receiver can relax the design constraints of an inverter-based CMOS LNA, paving the way toward a fully integrated qubit readout chain. The qubit state discriminator consists of a digital signal processor that computes the qubit state from the digitizer output and a pre-determined threshold. The proposed system realizes feedback-based optimal control for error mitigation and reduction of the required data rate through the serial interface to room temperature electronics.
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