两种标准WLR电流斜坡试验氧化物可靠性的比较

2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515) Pub Date : 2000-10-23 DOI:10.1109/IRWS.2000.911936

B. Lanchava, P. Baumgartner, A. Martin, A. Beyer, E. Mueller

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引用次数: 1

摘要

比较了两种不同的晶圆级可靠性电流斜坡算法(CSQ (current Step Qbd)应力和JEDEC J-Ramp应力)在7.5 nm和12 nm厚栅极氧化物(GOX)上得到的GOX可靠性结果。观察到的斜坡轮廓和阶跃保持时间t/子阶跃/对可靠性数据的影响表明，在测试设备(DUT)的类型上有很强的依赖性。p型mos器件似乎更容易受到电流斜坡速率变化的影响。从GOX界面粗糙度、应力损耗效应和试验结构的串联电阻等方面对所得结果进行了讨论。

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Comparison of two standard WLR current-ramped tests for oxide reliability

A comparison between the GOX-Reliability results obtained on 7.5 nm and 12 nm thick gate oxides (GOX) using two different wafer level reliability current ramp algorithms-a CSQ (Current Step Qbd) stress on the one hand and the JEDEC J-Ramp, on the other hand-are presented. The observed influence of the ramping profile and the step holding time t/sub step/ on the reliability data shows a strong dependence on the type of device under test (DUT). The P-type MOS-devices seem to be more susceptible to the changes of the current ramping rate. The obtained results are discussed in terms of the GOX interface roughness, depletion effects during the stress, and the serial resistance of the test structure.

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2000 IEEE International Integrated Reliability Workshop Final Report (Cat. No.00TH8515)

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